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Express-LPC User’s ManualPage 22
Signal Descriptions (cont’d)
Row D
Pin Signal Description Type PU/PD Comment
D1
GND
Ground PWR - -
D2
IDE_D5
IDE Data Bus IO - -
D3
IDE_D10
IDE Data Bus IO - -
D4
IDE_D11
IDE Data Bus IO - -
D5
IDE_D12
IDE Data Bus
IO - -
D6
IDE_D4
IDE Data Bus IO - -
D7
IDE_D0
IDE Data Bus IO - -
D8
IDE_REQ#
IDE Device DMA Request. IO - int. PD 11.5k in ICH8
D9
IDE_IOW#
IDE IO Write O-3.3 - -
D10
IDE_ACK#
IDE DMA Acknowledge O-3.3 - -
D11
GND
Ground PWR - -
D12
IDE_IRQ
IDE Interrupt Request I-3.3 PU 8K2 3.3V -
D13
IDE_A0
IDE Adress Bus O-3.3 - -
D14
IDE_A1
IDE Adress Bus
O-3.3 - -
D15
IDE_A2
IDE Adress Bus O-3.3 - -
D16
IDE_CS1#
IDE Chip Select for 1F0h to 1FFh range O-3.3 - -
D17
IDE_CS3#
IDE Chip Select for 3F0h to 3FFh range O-3.3 - -
D18
IDE_RESET#
IDE Reset Output to Device
O-3.3 - -
D19
PCI_GNT3#
PCI Bus Grant 3 O-3.3 - int. PU 20k in ICH8
D20
PCI_REQ3#
PCI Bus Reqest 3 I-3.3 PU 8K2 3.3V -
D21
GND
Ground PWR - -
D22
PCI_AD1
PCI Adress & Data Bus line IO-3.3 -
D23
PCI_AD3
PCI Adress & Data Bus line IO-3.3 -
D24
PCI_AD5
PCI Adress & Data Bus line IO-3.3 -
D25
PCI_AD7
PCI Adress & Data Bus line IO-3.3 -
D26
PCI_C/BE0#
PCI Bus Command and Byte enables 0 IO-3.3 - -
D27
PCI_AD9
PCI Adress & Data Bus line
IO-3.3 -
D28
PCI_AD11
PCI Adress & Data Bus line IO-3.3 -
D29
PCI_AD13
PCI Adress & Data Bus line IO-3.3 -
D30
PCI_AD15
PCI Adress & Data Bus line IO-3.3 -
D31
GND
Ground PWR - -
D32
PCI_PAR
PCI Bus Parity IO-3.3 - -
D33
PCI_SERR#
PCI Bus System Error IO-3.3 PU 8K2 3.3V -
D34
PCI_STOP#
PCI Bus Stop IO-3.3 PU 8K2 3.3V -
D35
PCI_TRDY#
PCI Bus Target Ready IO-3.3 PU 8K2 3.3V -
D36
PCI_FRAME#
PCI Bus Cycle Frame
IO-3.3
PU 8K2 3.3V
-
D37
PCI_AD16
PCI Adress & Data Bus line IO-3.3 -
D38
PCI_AD18
PCI Adress & Data Bus line IO-3.3 -
D39
PCI_AD20
PCI Adress & Data Bus line IO-3.3 -
D40
PCI_AD22
PCI Adress & Data Bus line IO-3.3 -
D41
GND
Ground PWR - -
D42
PCI_AD24
PCI Adress & Data Bus line IO-3.3 -
D43
PCI_AD26
PCI Adress & Data Bus line IO-3.3 -
D44
PCI_AD28
PCI Adress & Data Bus line IO-3.3 -
D45
PCI_AD30
PCI Adress & Data Bus line
IO-3.3 -
D46
PCI_IRQC#
PCI Bus Interrupt Request C I-3.3 PU 8K2 3.3V -
D47
PCI_IRQD#
PCI Bus Interrupt Request D I-3.3 PU 8K2 3.3V -
D48
PCI_CLKRUN#
PCI Clock Run I-3.3 PU 8K2 3.3V -
D49
PCI_M66EN#
Control PCI Speed 33/66 Mhz
I-3.3 - Fixed to 33 Mhz
D50
PCI_CLK
PCI Clock O-3.3 - -
D51
GND
Ground PWR - -
D52
PEG_TX0+
PCIe 0 Transmit + / SDVO B [RED] + O - DP - not supported
D53
PEG_TX0-
PCIe 0 Transmit - / SDVO B [RED] - O - DP - not supported
D54
PEG_LANE_RV#
PCIe Lane Reversal I-3.3 - -
D55
PEG_TX1+
PCIe 1 Transmit + / SDVO B [GRN] + O - DP - not supported
- Express-LPC 1
- Revision History 2
- Table of Contents 3
- Disclaimer 5
- Environmental Responsibility 5
- Trademarks 5
- Conventions 6
- 1 Introduction 7
- 2 Specifications 8
- 2.3 Audio 9
- 2.5 Multi I/O 9
- 2.7 Super I/O 9
- 2.8 Power Specifications 10
- 3 Functional Diagram 11
- 4 Mechanical Dimensions 12
- 5.1 COM Express 13
- Type 2 compatible pinout 13
- 5.3 Pin Definitions 14
- Pin Definitions (cont’d) 15
- 5.4 Signal Descriptions 16
- Signal Descriptions (cont’d) 17
- 6 Embedded Functions 25
- 6.2 GPIO 26
- 6.3 Hardware Monitoring 27
- 7 System Resources 28
- 7.3 Legacy I/O Map 29
- Legacy I/O Map (cont’d) 30
- PIC Mode 30
- APIC Mode 31
- 7.6 PCI Interrupt Routing Map 32
- 8 BIOS Setup Utility 33
- 8.1.1 Main Setup Menu 34
- 8.1.2 Navigation 35
- 8.2 Main Setup 37
- 8.3 Advanced BIOS Setup 38
- 8.3.1 CPU Configuration 39
- CPU Configuration Settings 39
- Max CPUID Value Limit 39
- 8.3.2 Chipset Configuration 41
- DRAM Frequency 41
- Configure DRAM Timing by SPD 41
- APIC ACPI SCI IRQ 41
- Internal Graphics Mode Select 42
- DVMT Mode Select 42
- 8.3.4 IDE Configuration 44
- IDE Configuration Settings 44
- ATA/IDE Configuration 44
- Legacy IDE Channels 44
- Hard Disk Write Protect 45
- IDE Detect Time Out 45
- ATA(PI)80Pin Cable Detection 45
- 8.3.5 AHCI Configuration 45
- AHCI Ports 46
- Onboard LAN Boot ROM 47
- HD Audio Controller 47
- SMBus Controller 47
- SuperIO Configuration Screen 48
- Floppy A 48
- OnBoard Floppy Controller 48
- Serial Port1 Address 49
- Serial Port2 Address 49
- Parallel Port Address 49
- Parallel Port Mode 49
- 8.3.7 USB Configuration 50
- USB Configuration Settings 50
- Parallel Port IRQ 50
- Active State Power-Management 53
- PCIE Ports 0-3 Configuration 53
- PCIE High Priority Port 53
- Remote Access 55
- Serial Port Number 55
- Remote Access Configuration 55
- Option Description 56
- 8.3.11 Trusted Computing 57
- Execute TPM Command 57
- 8.4 Power Management 58
- ACPI Aware O/S 59
- ACPI Version Features 59
- ACPI APIC Support 59
- USB Device Wakeup from S3/S4 59
- AMI OEMB Table 59
- Suspend mode 60
- Headless mode 60
- Restore on AC Power Loss 60
- ACPI OS Shutdown Mode 60
- Power Management/APM 61
- Power Button Mode 61
- Suspend Time Out 61
- 8.4.2 APM Configuration 61
- Video Power Down Mode 62
- Throttle Temperature 63
- Throttle Duty 63
- Critical Temperature 63
- 8.5 Boot Setup 64
- Quick Boot 65
- Quiet Boot 65
- AddOn ROM Display Mode 65
- Bootup Num-Lock 66
- PS/2 Mouse Support 66
- Wait for ‘F1’ If Error 66
- Hit ‘DEL’ Message Display 66
- Interrupt 19 Capture 66
- Boot Device Priority 67
- Boot Device Groups 67
- 8.6 Security Setup 68
- 8.6.3 Change User Password 70
- 8.6.4 Clear User Password 70
- 8.7 Exit Menu 71
- Discard Changes 72
- Load Optimal Defaults 72
- Load Failsafe Defaults 72
- Viewing BIOS Checkpoints 73
- 9.3 POST Code Checkpoints 76
- POST Code Checkpoints cont’d: 77
- 9.5 DIM Code Checkpoints 78
- 9.6 ACPI Runtime Checkpoints 79
- 9.7 Boot Block Beep Codes 80
- 9.8 POST BIOS Beep Codes 80
- Important Safety Instructions 82
- Getting Service 84
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