Adlink ACL-8112 Series Manual de usuario Pagina 13
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Introduction
•
5
•
ACL-8112PG:
Bipolar :
±
10V ,
±
5V,
±
2.5V,
±
1.25V,
±
0.625V
Or
Bipolar :
±
5V,
±
2.5V,
±
1.25V,
±
0.625V,
±
0.3125V
•
Conversion Time:
8
µ
sec
•
Overvoltage protection:
Continuous
±
35V maximum
•
Accuracy:
(ACL-8112HG)
GAIN = 0.5, 1
0.01% of FSR
±
1 LSB
GAIN = 5, 10
0.02% of FSR
±
1 LSB
GAIN = 50, 100
0.04% of FSR
±
1 LSB
GAIN = 500, 1000
0.04% of FSR
±
1 LSB
(ACL-8112DG)
GAIN = 0.5, 1
0.01% of FSR
±
1 LSB
GAIN = 2, 4
0.02% of FSR
±
1 LSB
GAIN = 8
0.04% of FSR
±
1 LSB
(ACL-8112PG)
GAIN = 0.5, 1, 2, 4
0.015% of FSR
±
1 LSB
GAIN = 8, 16
0.02% of FSR
±
1 LSB
•
Input Impedance:
10 M
Ω
•
AD conversion trigger modes:
Software, Pacer, and External
trigger
•
Data Transfer:
Pooling, DMA, Interrupt
•
Sampling Rate:
• 100 KHz maximum for single channel
• 100 KHz maximum for multiplexing on ACL-8112PG
• 20 KHz maximum for multiplexing on ACL-8112DG/HG
Analog Output (D/A)
•
Converter:
DAC7541 or equivalent, monolithic multiplying
•
Number of channels:
2 double-buffered analog outputs
•
Resolution:
12-bit
- User’s Guide 1
- Getting Service from ADLINK 4
- Table of Contents 5
- How to Use This Guide 8
- Introduction 9
- Introduction 10
- 1.1 Features 11
- 1.2 Applications 12
- 1.3 Specifications 12
- 1.4 Software Support 16
- Installation 17
- 2.2 Unpacking 18
- 2.3 ACL-8112's Layout 19
- Installation 20
- 2.5 Base Address Setting 21
- 2.7 DMA Channel Setting 24
- 2.9 Clock Source Setting 26
- 2.10 IRQ Level Setting 26
- Signal Connections 29
- 3.4 Digital I/O Connection 36
- 3.6.1 Connect with ACLD-8125 38
- 3.6.2 Connect with ACLD-9137 38
- 3.6.3 Connect with ACLD-9182 38
- 3.6.4 Connect with ACLD-9185 38
- 3.6.5 Connect with ACLD-9188 38
- Registers 39
- 4.1 I/O Port Address 40
- 4.2 A/D Data Registers 41
- 4.8 Digital I/O register 47
- 4.9 D/A Output Register 48
- Operation Theory 51
- 5.1.2 A/D Trigger Modes 52
- Vout Vref 54
- 5.4 Timer/Counter Operation 55
- Calibration & Utilities 59
- 6.2 VR Assignment 60
- 6.3 D/A Adjustment 60
- 6.5 A/D Adjustment 61
- C Language Library 63
- 7.1 _8112_Initial 64
- Example: 65
- 7.2 _8112_Switch_Card_No 66
- 7.3 _8112_DI 67
- 7.4 _8112_DI _Channel 68
- 7.5 _8112_DO 69
- 7.6 _8112_DA 70
- 7.7 _8112_AD_Input_Mode 71
- 7.8 _8112_AD_Set_Channel 73
- 7.9 _8112_AD_Set_Range 74
- Argument: 76
- Return Code: 76
- 7.10 _8112_AD_Set_Mode 77
- 7.11 _8112_AD_Soft_Trig 79
- 7.12 _8112_AD_Aquire 80
- 7.13 _8112_CLR_IRQ 81
- 7.14 _8112_AD_DMA_Start 82
- 7.15 _8112_AD_DMA_Status 84
- 7.16 _8112_AD_DMA_Stop 85
- 7.17 _8112_AD_INT_Start 86
- 7.18 _8112_AD_INT_Status 87
- 7.19 _8112_AD_INT_Stop 88
- 7.20 _8112_AD_Timer 89
- 7.21 _8112_TIMER_Start 90
- 7.22 _8112_TIMER_Read 91
- 7.23 _8112_TIMER_Stop 91
- Appendix A. Demo Programs 93
- Warranty Policy 94
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