Adlink ASD8P-MT1 Series Manual de usuario

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Advance Technologies; Automate the World.
ASD8P-MT1 Series
M-2 PCIe x2 Gen2 SSD Module
Specification
Revision: 1.00
Revision Date: August 5, 2014
Part No: 50-1Z171-2010
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1 2 3 4 5 6 ... 42 43

Indice de contenidos

Pagina 1 - ASD8P-MT1 Series

Advance Technologies; Automate the World. ASD8P-MT1 Series M-2 PCIe x2 Gen2 SSD Module Specification Revision: 1.00 Revision Date

Pagina 2 - Revision History

Page 10 of 43 ASD8P-MT1 Specification Manufacturer Platform Chipset Manufacturer Platform Chipset ASUS M5A99X EVO AMD 990 HP Z200 Intel®

Pagina 3 - Disclaimer

ASD8P-MT1 Specification Page 11 of 43 Manufacturer Platform Chipset Manufacturer Platform Chipset 540s) Dell 220 Intel® G45 Lenovo M80 Int

Pagina 4 - Table of Contents

Page 12 of 43 ASD8P-MT1 Specification Manufacturer Platform Chipset Manufacturer Platform Chipset KILLER Dell 3010 DT Intel® H61 ASRock Z87

Pagina 5 - 1 Overview

ASD8P-MT1 Specification Page 13 of 43 Certifications Table 7. Device Certifications Certification Description CE compliant Indicates conformity wi

Pagina 6 - 2 Product Specification

Page 14 of 43 ASD8P-MT1 Specification Reliability Table 10. Reliability specifications Parameter Value Mean Time between Failure (MTBF) > 1,500

Pagina 7

ASD8P-MT1 Specification Page 15 of 43 Test Description Performance criteria Reference standard Radiated RF immunity 80~1000MHz, 3V/m, 80% AM with 1

Pagina 8

Page 16 of 43 ASD8P-MT1 Specification 2.1 Functional Block Diagram 2.2 Mechanical Drawing: M. 2 2280-D5-B-M: LGT-xxxB1P

Pagina 9

ASD8P-MT1 Specification Page 17 of 43 2.3 Architecture The ASD8P-MT1 PCIe Gen2 x 2 Lane Solid State Drive (SSD) utilizes a cost effective system-on-

Pagina 10

Page 18 of 43 ASD8P-MT1 Specification 2.5 Bootable Device: The ASD8P-MT1 PCIe Gen2 x 2 Lane Solid State Drive (SSD) is configured as a bootable dev

Pagina 11

ASD8P-MT1 Specification Page 19 of 43 3 Pin Locations and Signal Descriptions 3.1 Pin Locations The data and power connector pin locations of the A

Pagina 12

Page 2 of 43 ASD8P-MT1 Specification Revision History Revision Date Changes 1.00 05/08/2014 Initial release

Pagina 13

Page 20 of 43 ASD8P-MT1 Specification 3.3 Socket 2 PCIe-based SSD Module Pinout Pin#38 is reserved for obeying PCI Express specification; Devslp is

Pagina 14

ASD8P-MT1 Specification Page 21 of 43 4 PCI Express 4.1 Interface The PCI Express interface supports the x1 PCI Express interface (one Lane). A Lan

Pagina 15

Page 22 of 43 ASD8P-MT1 Specification CLKREQ# Signal The CLKREQ# signal is an open drain, active low signal that is driven low by the PCI Express M

Pagina 16 -

ASD8P-MT1 Specification Page 23 of 43 Additionally, the device must ensure that it does not pull CLKREQ# low unless CLKREQ# is being intentionally a

Pagina 17 - 2.4 Power Mode Support

Page 24 of 43 ASD8P-MT1 Specification To exit L1, the device must assert CLKREQ# (low) to re-enable the reference clock. After the device asserts C

Pagina 18 - 2.5 Bootable Device:

ASD8P-MT1 Specification Page 25 of 43 Refer to the PCI Express Card Electromechanical Specification for more details on the functional requirements

Pagina 19 - 3.2 M. 2 Socket Definition

Page 26 of 43 ASD8P-MT1 Specification 4.5 UART Interface The on-chip asynchronous interface (UART, Universal Asynchronous Receiver and Transmitter)

Pagina 20

ASD8P-MT1 Specification Page 27 of 43 5 ATA Command Sets 5.1 ATA Command The ASD8P-MT1 PCIe Gen2 x 2 Lane SSD supports all the mandatory ATA command

Pagina 21 - 4 PCI Express

Page 28 of 43 ASD8P-MT1 Specification Table 13 Supported ATA Command Set Command Name Command Code Command Name Command Code DATA SET MANAGEMENT 06

Pagina 22

ASD8P-MT1 Specification Page 29 of 43 Identify Device Data The following table details the sector data returned after issuing an IDENTIFY DEVICE com

Pagina 23

ASD8P-MT1 Specification Page 3 of 43 Copyright 2014 ADLINK Technology, Inc. Disclaimer The information in this document is subject to change withou

Pagina 24

Page 30 of 43 ASD8P-MT1 Specification Word F=Fixed V=Variable X=Both 128GB 256GB 512GB Default Value Description 63 V 0007h 0007h 0007h 0007h Mult

Pagina 25 - 4.4 SDIO Interface

ASD8P-MT1 Specification Page 31 of 43 Word F=Fixed V=Variable X=Both 128GB 256GB 512GB Default Value Description 96 F 0000h 0000h 0000h 0000h

Pagina 26 - 4.5 UART Interface

Page 32 of 43 ASD8P-MT1 Specification Word F=Fixed V=Variable X=Both 128GB 256GB 512GB Default Value Description 209 F 4000h 4000h 4000h 4000h Ali

Pagina 27 - 5 ATA Command Sets

ASD8P-MT1 Specification Page 33 of 43 5.2 Power Management Command Set The ASD8P-MT1 PCIe Gen2 x 2 Lane SSD supports the power management command s

Pagina 28

Page 34 of 43 ASD8P-MT1 Specification - SECURITY FREEZE LOCK The drive can be secured by executing SECURITY FREEZE LOCK command- After command com

Pagina 29

ASD8P-MT1 Specification Page 35 of 43 Thresholds from the Attribute Threshold sectors and then waits for the host to transfer the 512 bytes of Attri

Pagina 30

Page 36 of 43 ASD8P-MT1 Specification SMART READ LOG SECTOR (Code D5h) This command returns the indicated log sector contents to the host. Sector c

Pagina 31

ASD8P-MT1 Specification Page 37 of 43 SMART READ LOG SECTOR (Code DAh) This subcommand is used to communicate the reliability status of the device t

Pagina 32

Page 38 of 43 ASD8P-MT1 Specification Subcommand Code LBA Low valueEXECUTE OFF-LINE IMMEDIATE D4h EXECUTE SMART OFF-LINE ROUTINE 00h EXECUTE S

Pagina 33

ASD8P-MT1 Specification Page 39 of 43 5.6 48-Bit Address Command Set The ASD8P-MT1 PCIe Gen2 x 2 Lane SSD supports the Host Protected Area command

Pagina 34 - 5.4 SMART Command Set

Page 4 of 43 ASD8P-MT1 Specification Table of Contents 1 Overview ...

Pagina 35

Page 40 of 43 ASD8P-MT1 Specification 6 SATA Command Sets 6.1 SATA Command The SATA 3. 0 Specification is a super set of the ATA/ATAPI-8 specificat

Pagina 36

ASD8P-MT1 Specification Page 41 of 43 7 References This document references standards defined by a variety of organizations as listed below. Table

Pagina 37

Page 42 of 43 ASD8P-MT1 Specification 8 Getting Service Contact us should you require any service or assistance. ADLINK Technology, Inc. Address:

Pagina 38

ASD8P-MT1 Specification Page 43 of 43 ADLINK Technology Japan Corporation Address: KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho, Chiyoda-ku, Tokyo 101

Pagina 39

ASD8P-MT1 Specification Page 5 of 43 1 Overview The ASD8P-MT1 Series PCIe x2 Gen2 Solid State Drive (SSD) delivers leading performance in an indust

Pagina 40 - 6 SATA Command Sets

Page 6 of 43 ASD8P-MT1 Specification 2 Product Specification Form Factor: M. 2 type 2280-D5-B-M SSD form factor Capacity: M. 2 2280-D5-B-M 128GB (A

Pagina 41 - 7 References

ASD8P-MT1 Specification Page 7 of 43 Bandwidth Performance Table 2. Maximum Sustained Read and Write Bandwidth on Windows 7 x64 platform Capacity

Pagina 42 - 8 Getting Service

Page 8 of 43 ASD8P-MT1 Specification 4K Read (IOPS) 94,000 (PCIe Gen2) 4K Write (IOPS) 78,000 (PCIe Gen2) 128GB CDM QD32 IOPS up to Read 95,000

Pagina 43

ASD8P-MT1 Specification Page 9 of 43 Windows 7 x86, x64; Windows 8 x86, x64; Linux series, Red Hat 6. 5, Fedora, SUSE, Ubuntu; Windows Server 2008,

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