Adlink PCI-9810 Manual de usuario Pagina 9
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Valorado. / 5. Basado en revisión del cliente
Table of Contents iii
W_9812_Free_DMA_Mem ........................................... 61
W_9812_Get_Sample .................................................. 62
7 Calibration......................................................................... 63
7.1 Before You Proceed .......................................................... 63
7.2 VR Assignment .................................................................. 63
7.3 A/D Calibration................................................................... 64
A/D Calibration for Channel 0 ....................................... 64
A/D Calibration for Channels 1/2/3 ............................... 64
8 Software Utility ................................................................. 65
8.1 Running the Utility.............................................................. 65
8.2 System Configuration ........................................................ 66
8.3 Calibration.......................................................................... 67
8.4 Functional Testing ............................................................. 69
- NuDAQ PCI-9812/9810 1
- Getting service 3
- Using this manual 5
- Conventions 6
- Table of Contents 7
- Table of Contents iii 9
- List of Tables 10
- List of Figures 11
- 1 Introduction 13
- 1.3 Specifications 14
- 1.4 Unpacking Checklist 16
- 1.5 Software Support 17
- 6Introduction 18
- Introduction 7 19
- 8Introduction 20
- 2 Hardware Information 21
- 2.2 Connectors 22
- JP1 Pin Definition 23
- 2.3 Input Settings 24
- External Clock 0 26
- External Clock 1 26
- Digital Input 26
- 3 Installation 27
- 3.3 Configuring the Card 28
- 4Registers 29
- ADC Channel Enable Register 30
- ADC Clock Divisor Register 31
- Trigger Mode Register 32
- Trigger Level Register 33
- ±1 V) Trigger voltage(±5 V) 33
- Trigger Source Register 34
- Post Trigger Counter Register 35
- FIFO Status Register 36
- FIFO Control Register 37
- Acquisition Enable Register 38
- Clock Source Register 39
- 4.2 High Level Programming 40
- 4.3 Low Level Programming 40
- 5 Operation Theory 41
- 30 Operation Theory 42
- 5.2 Signal Source Control 43
- 5.3 Trigger Source Control 44
- Operation Theory 33 45
- Trigger Modes 46
- Operation Theory 35 47
- 5.4 Clock Source Control 48
- Operation Theory 37 49
- 5.5 Data Transfer 50
- Total Data Throughput 51
- Maximum Acquiring Data Length 51
- Bus-mastering Data Transfer 52
- Host Memory Operation 52
- Operation Theory 41 53
- 5.6 Data Format 54
- Operation Theory 43 55
- 44 Operation Theory 56
- 6 Function Reference 57
- 6.2 Programming Guide 58
- Data Types 59
- 6.3 Function Reference 60
- Return Code(s) 61
- _9812_Close 62
- _9812_AD_DMA_Start 63
- 0 No trigger is detected 64
- 1 Trigger is detected 64
- _9812_AD_DMA_Status 66
- _9812_AD_DMA_Stop 67
- _9812_Set_Clk_Src 68
- _9812_Set_Clk_Rate 69
- _9812_Set_Trig 70
- Function Reference 59 71
- PCICardNumErr 71
- PCICardNotInit 71
- InvalidClkDiv 71
- W_9812_Alloc_DMA_Mem 72
- W_9812_Free_DMA_Mem 73
- W_9812_Get_Sample 74
- 7 Calibration 75
- 7.3 A/D Calibration 76
- 8 Software Utility 77
- 8.2 System Configuration 78
- 8.3 Calibration 79
- 68 Software Utility 80
- 8.4 Functional Testing 81
- 70 Software Utility 82
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